Duan Research Group

Hetero-integrated Nanostructures and Nanodevices


Sub-100 nm channel length graphene transistors

L. Liao, J. Bai, R. Cheng, Y. Lin, S. Jiang, Y. Qu, Y. Huang, and X. Duan

Nano Lett. 10, 3952-3956 (2010)

Here we report high-performance sub-100 nm channel length graphene transistors fabricated using a self-aligned approach. The graphene transistors are fabricated using a highly doped GaN nanowire as the local gate with the source and drain electrodes defined through a self-aligned process and the channel length defined by the nanowire size. This fabrication approach allows the preservation of the high carrier mobility in graphene and ensures nearly perfect alignment between source, drain, and gate electrodes. It therefore affords transistor performance not previously possible. Graphene transistors with 45−100 nm channel lengths have been fabricated with the scaled transconductance exceeding 2 mS/μm, comparable to the best performed high electron mobility transistors with similar channel lengths. Analysis of and the device characteristics gives a transit time of 120−220 fs and the projected intrinsic cutoff frequency (fT) reaching 700−1400 GHz. This study demonstrates the exciting potential of graphene based electronics in terahertz electronics.
UCLA, Department of Chemistry and Biochemistry
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Los Angeles, CA 90095-1569
E-mail: xduan@chem.ucla.edu