Pushing the Performance Limit of Sub-100 nm Molybdenum Disulfide Transistors
Yuan Liu, Jian Guo, Yecun Wu, Enbo Zhu, Nathan O Weiss, Qiyuan He, Hao Wu, Hung-Chieh Cheng, Yang Xu, Imran Shakir, Yu Huang, Xiangfeng Duan
Nano Lett. 16, 6337-6342 (2016)
Two-dimensional semiconductors (2DSCs) such as molybdenum disulfide (MoS2) have attracted intense interest as an alternative electronic material in the postsilicon era. However, the ON-current density achieved in 2DSC transistors to date is considerably lower than that of silicon devices, and it remains an open question whether 2DSC transistors can offer competitive performance. A high current device requires simultaneous minimization of the contact resistance and channel length, which is a nontrivial challenge for atomically thin 2DSCs, since the typical low contact resistance approaches for 2DSCs either degrade the electronic properties of the channel or are incompatible with the fabrication process for short channel devices. Here, we report a new approach toward high-performance MoS2 transistors by using a physically assembled nanowire as a lift-off mask to create ultrashort channel devices with pristine MoS2 channel and self-aligned low resistance metal/graphene hybrid contact. With the optimized contact in short channel devices, we demonstrate sub-100 nm MoS2 transistor delivering a record high ON-current of 0.83 mA/μm at 300 K and 1.48 mA/μm at 20 K, which compares well with that of silicon devices. Our study, for the first time, demonstrates that the 2DSC transistors can offer comparable performance to the 2017 target for silicon transistors in International Technology Roadmap for Semiconductors (ITRS), marking an important milestone in 2DSC electronics.